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基于LTE的RS解扰的ASIC设计 Introduction Long-TermEvolution(LTE)isawirelesscommunicationstandardthatenableshigh-speeddatatransmissionformobiledevices.InLTE,thedownlinkreferencesignals(RS)areusedtoenablechannelestimationandsynchronizationatthereceiverend.However,theseRSsignalsarevulnerabletointerferencefromothersignals,whichcanresultinlowerperformanceofthewirelesscommunicationsystemandreduceddatarates.Hence,thereisaneedforasolutiontomitigatetheeffectsofthisinterference.ThispaperpresentsthedesignofanASICforRSdescramblingbasedonLTE. LTEDownlinkReferenceSignals InLTE,theRSsignalsaretransmittedinthefrequencyandtimedomains.Thefrequency-domainRSsignalsusetheso-calledCell-SpecificReferenceSignals(CRS)andtheUE-SpecificReferenceSignals(URS).TheCRSsignalsareusedforcell-specificmeasurements,whiletheURSsignalsareusedforUE-specificmeasurements.Thetime-domainRSsignalsaretransmittedusingthePhysicalDownlinkControlChannel(PDCCH)andthePhysicalDownlinkSharedChannel(PDSCH). RSDescrambling TheRSsignalscanbescrambledbyaCell-SpecificScramblingSequence(CSS)oraUE-SpecificScramblingSequence(USS).ThescrabmlingsequencesaregeneratedusingaZadoff-ChuoraSequenceShiftKeying(SSK)algorithm.WhentheRSsignalsarescrambled,thereceiverneedstodescrambletheminordertoperformchannelestimationandsynchronization.TheRSdescramblingprocessinvolvesapplyingacorrelationoperationbetweenthereceivedsignalandthecorrespondingdescramblingsequence. ASICDesign ThedesignofanASICforRSdescramblingisdividedintoseveralstages.Thefirststageinvolvesthedevelopmentofthehigh-levelarchitectureoftheASIC.Thesecondstageinvolvestheselectionofthetechnologyplatformandthedefinitionofthephysicaldesignandfloorplan.Thethirdstageinvolvesthedefinitionofthelogicdesign,simulation,andverification.Thefourthstageinvolvesthephysicaldesignandlayout.ThefifthstageinvolvesthefabricationandtestingoftheASIC. Thehigh-levelarchitectureoftheASICconsistsofseveralfunctionalblocks,includingthecorrelationmodule,thedescramblingsequencegenerationmodule,theinputdatabuffer,andtheout

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