VLSI课后习题d(苏州大学)学习资料.ppt

P321-4P321-4题目要求逻辑表达式1bitfulladderschematic4bitfulladderschematicAcomponenthierarchyp982-1P982-1P982-2aP982-2b-cP982-2dP992-5P992-6P992-7P992-9P992-9P992-10P992-10aP1002-10bP1002-10cP1002-10dP1012-132-13astickdiagram2-13Atransistor-levelschematicP1032-19P1032-19layoutP1713-1c)(a+b)(c+d)P1713-2ab)OAI-22:[(a+b)(c+d)]’d,eP1723-9b)DrawastickdiagramP1733-10a)Writethetruthtableforthetwo-inputXOR.b)Completetheschematicforthisgate-computethecomplementoftheinputsusinginverters.c)DrawastickdiagramforthepartialXORschematic.d)DrawastickdiagramforthecompleteXORschematic.P1743-15P1743-16P2364-1P236-2374-2答案P2374-4(a)P2374-4(b)P2374-4(c)P2404-75-4DrawacircuitdiagramforaD-typemaster-slaveflip-flopwithaclearinputbasedonthecircuitofFigure5-11(asynchronism)5-5DrawacircuitdiagramforaT-typemaster-slaveflip-flopbasedonthecircuitofFigure5-12RS、T触发器真值表由RS构成的T触发器逻辑图由RS构成的T触发器分析5-10Writethestatetransitiontableforanthree-bitconditionalcounter.Ithastwoinputs,countandreset(whichreturnsthecountertothe0counter),andathree-bitbinaryoutputofthecurrentcount.5-10statetransitiontable5-10veriloghdl5-10waveform5-10statetransitiongraph5-15Drawatransistorschematicforamaster-slave(D-type)flip-flopbuiltfromclockedinverters.5-15答案6-9(p345)a)Enumerateallthe16possiblefunctionsofatwo-inputALU.a)Enumerateallthe16possiblefunctionsofatwo-inputALU.b)Foreachpossiblefunction,listthecontrolinputstothethreefunctionblocksofthethreefunctionblockALU.6-13(p345)6-13a)Designthelogicforonebitoftheadder-subtracter.6-13一位加减法器逻辑图6-13一位加减法器波形6-13四位加减法器逻辑图6-13四位加减法器波形7-4Canthefloorplanbelowberoutedwithplanarpowerandgroundnets?Ifso,givearouting.Ifnot,explainwhy.7-5Howmuchcurrentcanbesuppliedbya10μmwidepowerlineinapadring?7-7Achipcoreis3000μm×2500μmandrequires0.8A.Itneeds18signalinputpadsand19signaloutputpads.a)HowmanyVDDandVSSpadsarerequiredassuminga12μmpowerring?7-8Whydoesn’tanoutputpadrequireelectrostaticdischargeprotectioncircuitry?8-4DesignanASMchartforthetrafficlightcontrollerofExample5-48-14SchedulethedataflowgraphofFigure8-19